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Fetch–Decode–Execute Cycle – Inside a Simple CPU

Computer ScienceComputers & HardwareAges 16–17

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A tiny CPU with PC, MAR, MDR, CIR, ACC, ALU and a control unit, connected to 16 or 32 memory cells by the address, data and control buses. Load an example program written in a simple assembly language (LDA, ADD, SUB, STA, BRZ, BRP, BRA, OUT, HLT) and step through each clock cycle to watch data move along the buses through the fetch, decode and execute stages; change the clock speed and count the cycles.

Lesson: Inside the computer: the CPU, registers, buses and the fetch–decode–execute cycle

What it shows

A stored-program computer keeps both instructions and data as numbers in main memory. The CPU repeats one cycle: it fetches the instruction at the address held in the program counter, decodes it in the control unit, then executes it, moving values between registers, the ALU and memory over the address, data and control buses. This model works like the Little Man Computer: three-digit decimal codes whose first digit is the opcode and last two digits the address, with one register transfer per clock cycle, so the cycle count shows how clock speed limits how fast a program runs.

How to use

Choose an Example program and set Value A and Value B. Press Step (1 cycle) to advance one clock cycle and read the register transfer at the top, such as MAR ← PC; press Whole instruction to finish the current instruction, or Run to let the Clock speed drive the CPU. Switch the Memory display between assembly and machine code, and click any memory cell to see how the CPU would read it as an instruction.

Parameters you can change

  • Example program Add two numbers (A + B), Count down from A to 0 (loop), Larger of A and B
  • Value A 0–50
  • Value B 0–50
  • Clock speed 0.5–20 Hz
  • Memory cells 16 cells, 32 cells
  • Memory display Assembly (LDA 13…), Machine code (513…)

Questions to explore

  1. Why is the program counter incremented during the fetch stage, before the instruction is executed?
  2. How many clock cycles do ADD and BRA need in this model, and why do they differ?
  3. In the countdown program, how does the total number of cycles change when A increases by 1?

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